芯微技术（深圳）有限公司

职位：IC 数字电路设计实习生 IC Digital Design Trainee
发布时间：2010-03-18
工作地点：深圳
信息来源：前程无忧
职位类型：兼职
职位描述
Digital Design trainee

Job Responsibilities

To implement digital block design according to IC specification

To perform chip or block verification with RTL simulation

To validate digital design through FPGA, includes FPGA simulation, FPGA synthesis and function debug

To validate the chip function with bench

Job Requirements

> Specialty related to electrical engineering, Master undergraduate.

> Familiar with Verilog, C language.

> Has FPGA application or practice digital design experience will be advantage

> Fluent in English writing, reading and speaking in the working environment

> Strong analytical skills, teamwork contributor and excellent communication skills

此职位要求至少能实习1年以上的硕士生，欢迎2011年及2012年毕业的硕士生加入！

公司简要介绍：
About Symwave
Symwave was founded in February 2001 by a team of leading analog/mixed signal IC design engineers.
The company has developed a broad portfolio of analog/mixed-signal IC technology based on a high-speed, low-power, CMOS IC design that can be implemented across serial, physical and/or wireless interfaces.
Symwave has developed proprietary clock and data recovery (CDR) and high speed Phase Lock Loop (PLL) techniques that result in high data-rate capability at extremely low power levels. Symwave's novel design approach enables the company to repurpose discrete analog and mixed-signal design blocks for multiple, diverse application environments.
Symwave is the semiconductor company to implement these novel CDR and PLL techniques into standard interface consumer products, enabling it to achieve unprecedented speed and power levels in targeted applications.

Symwave是于2001年2月由一队顶尖的模拟/混合信号集成电路设计工程师创建的。
公司已经开发了广泛的可应用于串行、物理层、无线接口的基于高速、低功耗CMOS集成电路设计的模拟/混合信号集成电路技术。
Symwave已经开发了专有的时钟和数据恢复（CDR）、高速锁相环（PLL）技术，因此以极低的功耗水平获得了高数据率的性能。Symwave独特的设计方法使公司能够再次规划各分立的模拟和混合信号模块用于多种、不同的应用环境。
Symwave是将这些CDR和PLL技术用于标准接口的消费类产品的半导体公司，使得它可以在目标应用中实现空前的高速和低功耗水平。